Microcontrollers with C

Microcontrollers with C – Cortex-M® and Beyond

Welcome to the page on my latest book – published October 2023. A kindle-version was published a month later. The main theme of the book is how to make best use of Microcontrollers when developing in C. With a firm outset in Arm’s Cortex-M family, I discuss how this compares with other architectures.

The last third of the book focuses on Parallel programming and Real-Time Operating Systems.

Please note that basic knowledge of C-programming is expected. This book is not an introduction to C in general.


The green PCB at the front of “Microcontrollers with C” originates from Photo at pexels.

Front-cover of “Microcontrollers with C”.





The figure on the back of “Microcontrollers with C” is from the chapter on the “Generic Embedded System”. As described in the book, it shows the very common “Load-and-Store” architecture. It may also be seen as the Cortex-M architecture with its 16 registers – not showing barrel-shifter etc. I created this figure in Visio.

Back-cover of “Microcontrollers with C”.

The Concept

“Microcontrollers with C”  introduces the generic microcontroller and its building blocks – with threads back to older milestones like AMD’s Bit-Slice, intel 8051 and also intel 8086 – even though the latter is a CPU – not an MCU.

Modern Nucleo-64 boards from ST are  introduced. We follow C-code through compiler and linker, through download and the Startup – bringing us to main(). Along the way we pickup a bit of assembly-language and learn about Arm specialties like the Literal Pools.

A Tools chapter gives an overview of GUIs like Eclipse and Visual Studio Code, as well as Linker options etc.

Next, we dig into core subjects like exceptions, the stack-frame, branch instructions,  and the Link-Register. We learn about CMSIS and how it makes life easier for the developer.

The components of an MCU – with the components of CMSIS

Moving on to the FPU (Floating-Point Unit), we compare this with the fast integer-arithmetic, and see how fast RAM can be used for data as well as for code. We continue into a short study of the MPU. Through all these subjects we study code – often with help from the debugger. Both Eclipse and Visual Studio Code are used in screenshots.

From Integer calculations to Floating point

The remaining three chapters of the book digs into the workings of operating systems, and introduces many patterns relevant for parallel programming. This leads to a FreeRTOS-based sample with Tasks, Interrupts, Semaphores and Queues.

Multiple Threads
Program with three threads

The technical stuff is spiced up a bit with personal experiences from older architectures. Including the story of how Diego Maradona helped me 😉

There’s a rich index at the back of the book – making it easier to come back to things when you realize you need them 🙂
Please note that as the e-book is a replica of the text-book, the contents and index do not work as links.

You also find lists of Tables and Figures at the back.


On Amazon, “Look Inside” is active on the kindle e-book, whereas on the paper-version you get the same functionality by pressing the button “Read Sample” below the cover-photo.

Source for the samples

Table of Contents

1 Introduction
2 The Tip of the Iceberg
3 An Embedded System
3.1 Introduction
3.2 A Generic Embedded System
3.3 CPU and MCU
3.4 Harvard and Von Neumann
3.5 Physical Memory Types
3.6 The Cortex Families
3.7 STM32F334R8 Architecture
3.7.1 Buses
3.7.2 Analog Interfaces
3.7.3 Digital Interfaces
4 Memory and the Linker
4.1 Memory Map
4.2 Bit-Banding
4.3 Fast Memory Access
4.4 The Build Process
4.5 Memory Sections in C
4.6 Linker
4.7 Linker Script
4.8 Linker Map
4.9 ELF
4.10 Stack & Heap with monitors
5 C Startup
5.1 Reset Vector
5.2 Literal Pool
5.3 Startup Code
6 Toolchains and IDEs
6.1 Arm Compilers
6.2 Libraries
6.3 Building for FPU
6.4 Make
6.5 Compiler and Linker Options
6.6 IDEs and alternatives
7 Cortex-M Programmers Model
7.1 History of Cortex-M
7.2 Cortex-M Modes
7.3 Registers and Call Stack
7.4 Exceptions
7.5 Instructions
7.5.1 Program Status Register
7.5.2 Branches
7.5.3 Conditional Instructions
7.5.4 Exclusive Instructions
7.5.5 Barriers
7.6 Alignment
7.6.1 Single Words and Half-words
7.6.2 Structs
8.1 Overview of CMSIS
8.2 CMSIS-Core
8.3 CMSIS-Driver – Low-Level
8.4 CMSIS-Driver High-Level
9 Floating Point Unit & DSP
9.1 Working In Floating Point
9.2 Floating-Point Without FPU
9.3 Fixed Point
9.4 Executing in CCMRAM
9.5 Summing it all up
10 Memory Protection Unit
10.1 Stack Guard
11 Operating Systems
11.1 Multiple Thread Solutions
11.2 Context Switching Between Threads
11.3 Storing and Retrieving State
11.4 Executing the Context Switch
12 Common Patterns
12.1 Layering
12.2 State Machines
12.3 Blocking Threads vs Callbacks
12.4 Reentrant Code
12.5 Divide and Conquer
12.5.1 Heterogenous Tasks
12.5.2 Assigning Priorities
12.5.3 SIMD
12.5.4 Pipelining
12.5.5 Dedicated Subsystems
12.6 Message-Based System
12.7 Ring Buffers
12.8 Dynamic Memory
12.9 Synchronization Patterns
12.9.1 Critical Section
12.9.2 Lock
12.9.3 Mutex
12.9.4 Semaphore
13 FreeRTOS and STM32CubeMX
13.1 Initial FreeRTOS Setup
13.2 ITM and Printf
13.3 Messages Between Tasks
13.4 Interrupt with Semaphore

List of Figures
List of Tables


Datasheets and Manuals used when writing the book

7563.ARM white paper – DSP capabilities of Cortex-M4 and Cortex-M7.pdf